1. Field of the Invention
The technical field relates to a silicon-on-insulator (SOI) structure.
2. Description of the Related Art
As a method for forming a transistor, the following methods are known: a method in which a silicon wafer is used, a method in which a non-single-crystal semiconductor layer provided over a substrate having an insulating surface is used, a method in which a substrate (SOI substrate) having a thin single crystal semiconductor layer provided over an insulating surface is used, and the like.
In particular, a transistor formed using an SOI substrate can have higher performance than a transistor formed by other methods.
Here, a Smart Cut (registered trademark) method is known as a method for manufacturing an SOI substrate.
The Smart Cut method is a method for forming an SOI substrate approximately through the following process.
First, a silicon wafer is irradiated with hydrogen ions, and an embrittlement region (also referred to as a microbubble layer, a separation layer, a peeling layer, or the like) is formed at a predetermined depth from a surface of the silicon wafer.
Next, an insulating layer to serve as a bonding layer is formed on the surface of the silicon wafer.
Then, the bonding layer and a base substrate are bonded to each other and heat treatment is performed thereon, whereby a crack is generated from the microbubble layer. Accordingly, part of the silicon wafer is separated, and a single crystal semiconductor layer formed using the part of the silicon wafer is provided over the substrate.
As for a method for manufacturing such an SOI substrate, refer to Reference 1.
[Reference]
Reference 1: Japanese Published Patent Application No. 2008-277789